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一种提高DSO插值性能的方法研究

The Research for Improving the Interpolation Performance of DSO
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摘要 由于受到ADC转换速率的限制,当数字示波器工作在快速时基档位时,最高实时采样率往往不能满足显示要求,这时候就需要对原始采样数据进行插值。目前,在进行波形内插时普遍采用了由软件实现正弦插值的方法,但该方法具有运算效率低、波形恢复质量差等缺点。文章提出了一种多相滤波器插值算法,该算法能够有效的减少波形失真,同时将该算法用FPGA设计实现,使数据处理的速度得到极大的提升,大大地提高了示波器在插值时的波形捕获率。 Duing to the restrictions of the ADC conversion rate, when the digital oscilloscope working in the fast-time base stalls, the highest real-time sampling rate usually can not meet the display requirements, at this time it would require interpolation for the original sample data. Currently, it commnly used method that realized sine interpolation by the software when conducting wave-form interpolation, but the method has shortcomings such as low efficiency operation, poor waveform recovery quality. Presenting a polyphase filter interpolation algorithm,it can effectively reduce the waveform distortion, while implementating the algorithm by using FPGA design, so that the speed of data processing greatly, and the waveform capture rate is enhanced greatly when the oscilloscope's in the interpolation.
出处 《电子质量》 2009年第9期6-9,共4页 Electronics Quality
关键词 插值 数字存储示波器 波形捕获率 FPGA interpolation digital storage oscilloscope waveform capture rate FPGA
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