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基于NIOSⅡ多核技术的Hopfield神经网络硬件实现方法 被引量:3

Method for hardware implementation of Hopfield neural network based on NIOS Ⅱ multi-core technology
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摘要 为了充分发挥人工神经网络所具有的并行计算、分布式存储的优点,提出了将NIOSⅡ多核技术应用于Hopfield神经网络硬件实现的方法.采用中断方式和SDRAM实现多核之间的通信,并将所实现的硬件用于数字识别,验证了多核通信方法应用于神经网络硬件实现的有效性和可行性. To take advantage of the parallel computing and distributed storage characteristics of Neural network,NIOS Ⅱ multi-core technology is used to implement the hardware of Hopfield neural network.The method uses interrupt and SDRAM to realize the communication between NIOS Ⅱ multi-cores.Then,the implemented Hopfield network is used for digital number identification.The effectiveness and feasibility of this method are proved.
作者 程丹 王连明
出处 《东北师大学报(自然科学版)》 CAS CSCD 北大核心 2011年第3期65-68,共4页 Journal of Northeast Normal University(Natural Science Edition)
基金 国家自然科学基金资助项目(50478007)
关键词 SOPC NIOSⅡ 多核通信 HOPFIELD神经网络 SOPC NIOS Ⅱ multicore communications Hopfield network
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