船舶系统测试性设计

Design of Ship System Level Testing

针对船舶系统设备的故障诊断需求,选择了基于IEEE1149系列边界扫描技术进行系统级测试性设计,提出了基于FPGA的总线控制器主/从模块设计技术途径,达到了提高系统级测试性水平的目标。

Focus on the fault-diagnoses demand of the ship electric equipments,we choose the IEEE1149 series standard BS tecnology to improve the system level testability.This paper raises the bus control module solution based on FPGA to achieve the system level testing aim.