期刊文献+

压敏电阻静电放电防护性能测试与研究

The performance testing and research of varistor electrostatic discharge protective
下载PDF
导出
摘要 设计基于PLC的静电放电自动测试系统,研究静电放电保护器件压敏电阻的防护性能。对压敏电阻180KD20的静电放电电流、响应电压、箝位电压与放电残余电压4个参数进行了测试,分析了其规律及特点以及与压敏电阻静电放电防护能力的关系。本研究为设计电路的静电防护器件选择压敏电阻提供了理论参考,对研究压敏电阻静电放电防护性能有一定的应用价值。 This paper design the automatic test system of electrostatic discharge based on PLC and research the protective performance of varistor which is the electrostatic discharge protective device.Four parameters of electrostatic discharge current,response voltage,clamping voltage and residual voltage of varistor 180KD20 were tested,and the rules and characteristics were analyzed,the relationships between parameters and varistor electrostatic protective capability were analyzed.This research provide a theoretical reference for the selection of varistor in the design of circuit protective devices,the study of varistor electrostatic protection performance has certain application value.
作者 王静 张菁 WANG Jing;ZHANG Jing(Yulin College,Yulin 719000,China)
机构地区 榆林学院
出处 《电子设计工程》 2020年第17期94-97,共4页 Electronic Design Engineering
基金 陕西省教育厅2019年度专项科学研究计划项目(19JK0997) 榆林学院2019年校级教学改革研究项目(JG1977)。
关键词 压敏电阻 防护性能 静电放电 箝位电压 varistor protective performance electrostatic discharge clamping voltage
  • 相关文献

参考文献9

二级参考文献58

  • 1于立涛,赵颖,徐鹏.浦项站中性点经小电阻接地的方案与设计[J].继电器,2004,32(20):43-45. 被引量:9
  • 2刘桂香,徐光亮,罗庆平.不同方法合成掺杂ZnO粉体制备ZnO压敏电阻[J].化工进展,2007,26(2):234-237. 被引量:3
  • 3王振林,李盛涛.氧化锌压敏陶瓷制造及其应用[M].北京:科学出版社,2009.
  • 4Salcedo J A,et al.TCAD methodology for design of SCR devices for electrostatic discharge (ESD) applications[J].IEEE Trans on ED,2007,54(4):822-832.
  • 5Salaméro C,et al.TCAD methodology for ESD robustness prediction of smart power ESD devices[J].IEEE Trans on DMR,2006,6(3):399-407.
  • 6Stricker A D,et al.Characterization and optimization of a bipolar ESD-device by measurements and simulations[J].Microelectronics Reliability,1999,39 (11):1563-1577.
  • 7Jiang L,et al.Simulation models of ESD event in ICs[A].Proceedings.6th International Conference on Solid-State and Integrated-Circuit Technology[C].Shanghai,2001.Vol.2,990-993.
  • 8Esmark K.Device simulation of ESD protection elements[D] ,Swiss Federal Instistituts of Technology,Zurich,2001.
  • 9Fankhauser B,et al.Using device simulations to optimize ESD protection circuits[A].International Symposium on Electromagnetic Compatibility[C].Santa Clara,2004,Vol.3,963-968.
  • 10Cui Q,et al.Robustness evaluation of ESD protection devices in NEMS using a novel TCAD methodology[A].3rd IEEE International Conference on Nano/Micro Engineered and Molecular Systems[C].Sanya,2008,41-44.

共引文献25

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部