一种低功耗低噪声高共模抑制斩波稳定放大器

A low power, low noise and high CMRR chopper-stabilized amplifier

功耗、噪声、共模抑制比(Common Mode Rejection Ratio,CMRR)是生物医学传感器模拟前端(Analog frontend,AFE)电路设计最重要的3个指标.传统模拟前端常采用三运放仪表放大,电路功耗过大,同时其增益与共模抑制比都依赖输入电阻的匹配,CMOS工艺下20%的电阻误差往往导致CMRR漂移,增益精度不高.为了解决这一问题,提出了一种斩波稳定放大器电路(Chopper-Stabilized Differential Difference Amplifier,CHSDDA),该电路的增益由输入电容与反馈电容比值决定,由于电容制造误差低,其增益精度得到极大提升;滤波电阻的选择上采用可调伪电阻结构,不仅减小了电路面积,同时可避免共模抑制比受到电阻精度的影响;此外,部分电路采用亚阈值偏置,降低了功耗.该电路基于TSMC 250 nm CMOS工艺,仿真结果显示,该电路实现了22.5 dB的差分增益和49.7 dB的CMRR,相位裕度为87.2°.在0.1 Hz至100 Hz的带宽内,等效输入参考噪声仅为15μV_(rms),同时,总电流消耗仅为80μA,可扩展至其他低功耗应用.

Power consumption,noise,and common mode rejection ratio(CMRR) are three important indicators in biomedical analog front-end(AFE)circuits design.The traditional instrumentation amplifier(IA)with a three op-amps structure consumes excessive power,meanwhile,both the gain and CMRR relies on the matching of the input resistance,and the gain and CMRR accuracy are difficult to improve further.To address this problem,a Chopper-Stabilized Differential Difference Amplifier(CHSDDA)is proposed.Since the gain of this topology is determined by the ratio of the input capacitance to the feedback capacitance,the closed-loop gain accuracy can be greatly improved due to the tiny error during capacitor realization.Besides,adjustable PMOS pseudo-resistance structure is adopted to avoid the CMRR from being affected by the resistance accuracy,and the circuit area can be reduced too.Some blocks are biased in sub-threshold region to reduce power consumption.The circuit is based on TSMC 250 nm CMOS process,simulation results show that the circuit has achieved a differential gain of 22.5 dB and a CMRR of 49.7 dB,with a phase margin of 87.2 degree.Considering the bandwidth from 0.1 Hz to 100 Hz,the equivalent input-referred noise is 15μV_(rms).Meanwhile,the total current consumption is 80μA,which is suitable for low-power applications.