H．264整像素运动向量搜索算法的FPGA实现

Implementation of H.264/AVC Integer Motion Estimation on FPGA

通过比较几种常用的整像素向量搜索算法,以EPZS算法为基础,引入一种适合硬件实现的H.264整像素向量搜索算法。算法首先从内存需求及流水线安排角度考虑,从EPZS算法中选取若干适合硬件的搜索模板。其次,算法选取若干易获取的预测点,并根据其与当前向量的相关程度排序。在解决了FPGA流水线延迟过大产生的硬件空闲问题后,已用XC2V3000芯片成功实现。实验表明算法在大幅缓解内存访问的压力、减小搜索点的同时,可保证视频的峰值信噪比及码流大小。

The paper proposes a hardware based H.264 integer motion vector search solution after researching on some frequently used algorithms. The algorithm is mainly based on EPZS. Firstly, search patterns are selected from EPZS after considering their memory and pipeline requirement. Secondly, the solution uses some easy-to-get predictors, and arranges them in order by their correlation with current motion vector. The design is implemented on FPGA XC2V3000 of Xilinx and solves the problem of hardware waiting which is generated by pipeline delay. The experimental results prove that it can gain similar PSNR and bit-rate compared to full-search algorithm while having higher memory re-use and much fewer calculation points.