期刊文献+

基于3-DES算法的FPGA加密应用 被引量:5

An implementation of FPGA security based on 3-DES algorithm
下载PDF
导出
摘要 阐述了一种针对SRAM工艺FPGA的加密保护方案,并给出了主要模块的实现结构。该方案应用当前流行的3-DES算法对校验数据加密,可靠性高,占用资源少,具有较高的实际应用价值。 This paper introduces an implementation to solve the securty problem of SRAM-based FPGA and presents the frame of the main modules.In this system the popular algorithm of Triple-DES has been applied to encrypt the data.The method has good authenticity and small consumption of resources. It can be widely used in practice.
出处 《电子技术应用》 北大核心 2008年第1期132-134,共3页 Application of Electronic Technique
关键词 DES 3-DES FPGA加密 CPLD DES 3-DES FPGA security CPLD
  • 相关文献

参考文献3

  • 1National institute of standards and technology.Data Encryptlon Standard(DES).FIPS PUB 46-3,1999.
  • 2SCHAFFER T, GLASER A, FRANZON P D. Chip-package co-implementation of a triple DES processor, advanced Packaging. IEEE Transaction 2004,27(1):194-202.
  • 3KITSOS P, GOUDEVENOS S, KOUFOPAVLOU O. VLSI implementations of the triple-DES block cipher Electronics, Circuits and Systems. Proceedings of the 2003 10th IEEE International Conference, 2003,1 (14-17): 76- 79.

同被引文献27

引证文献5

二级引证文献8

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部