摘要
基于AMBA2.0总线,设计并实现了一种使用3DES加密算法的IP核。该设计通过了行为级功能仿真和综合后的时序仿真,成功运用于一款32位浮点DSP芯片中,并且用TSMC 65 nm CMOS工艺实现。目前该IP核已经投入使用,在500 MHz的工作频率下,3DES加/解密速率达到615 Mbps,可以满足大部份系统数据处理的需求。
The paper presents the design and implementation procedure of a 3DES encryption IP core based on AMBA2.0 bus. The design of the circuit has passed behavioral simulation and timing simulation after synthesis. And the circuit has been integrated in a 32 bit floating point DSP and implemented in TSMC's 65 nm CMOS process. Now the IP core has come into use, the result shows that our design can work well at 500 MHz, with the rate of 615 Mbps for encryption or decryption. The design can meet the most system's data process requirements.
出处
《电子与封装》
2015年第1期19-23,共5页
Electronics & Packaging