摘要
A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteristic test shows that the output i dB compression point is about -8.5 dBm at 334 GHz and the maximum efficiency is obtained at the point, which is slightly below the 1 dB compression point. Compared with the conventional hybrid integrated circuit, a major advantage of the monolithic integrated circuit is the significant improvement of reliability and consistency. In this work, a terahertz monolithic frequency multiplier at this band is designed and fabricated.
A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteristic test shows that the output i dB compression point is about -8.5 dBm at 334 GHz and the maximum efficiency is obtained at the point, which is slightly below the 1 dB compression point. Compared with the conventional hybrid integrated circuit, a major advantage of the monolithic integrated circuit is the significant improvement of reliability and consistency. In this work, a terahertz monolithic frequency multiplier at this band is designed and fabricated.
基金
Supported by the National High-Technology Research and Development Program of China under Grant No 2011AA010203
the National Basic Research Program of China under Grant Nos 2011CB201704 and 2010CB327502
the National Natural Science Foundation of China under Grant Nos 61434006 and 61106074
