基于SiGe BiCMOS工艺的高速光接收机模拟前端电路

Analog Front-End Circuit for High-Speed Optical Receiver Based on SiGe BiCMOS Technology

基于IBM 0.18,μm SiGe BiCMOS工艺,设计了一款12.5,Gb/s的全差分光接收机模拟前端电路.该电路由跨阻放大器、限幅放大器、直流偏移消除电路和输出缓冲级组成.为获得更高的带宽,本文对Cherry-Hooper结构进行了改进,设计出一种三级级联的限幅放大器,而直流偏移消除电路则使用了差分有源密勒电容(DAMC)来替代传统的片外大电容,提高了电路集成度和稳定性.版图后仿结果表明,在探测器等效电容为300,f F的情况下,光接收机前端电路的跨阻增益为97,d B,-3,d B带宽为11.7,GHz,等效输入噪声电流小于14.2,pA/Hz^(1/2),芯片核心面积为720,μm×700,μm.

A fully differential analog front-end circuit for12.5,Gb/s optical receiver was optimally designed with IBM0.18,μm SiGe BiCMOS technology,which included transimpedance amplifier(TIA),limiting amplifier(LA),DC offset cancellation(DOC)circuit and output buffer.To obtain wider bandwidth,the Cherry-Hooper structure was modified,and a cascaded limiting amplifier with three-stage Cherry-Hooper structures was proposed.Additionally,the DOC circuit adopted a differential active Miller capacitor(DAMC)to replace the traditional large off-chip capacitors,which was beneficial for improving the integration level and stability.Post-layout simulation results showed that the optical receiver front-end circuit had a-3,dB bandwidth of11.7,GHz with a transimpedance gain of97,dB while using a photodiode equivalent capacitance of300,fF.The equivalent input noise current was less than14.2,pA/Hz within the interesting band,and the size of core chip was720,μm×700,μm.