RISC-V随机化过程的抗功耗分析攻击设计

Anti-power Analysis Attack Design Based on RISC-V Randomization Process

提出了一种基于随机化过程来抵御功耗分析攻击的方法。该随机化过程综合采用3种手段:在指令执行过程中,随机生成并插入与上一条真实指令相似的虚拟指令,使得插入的随机功耗与上条真实指令相近以避免被准确分析功耗;在指令执行、写回阶段插入一个随机延时来混淆指令执行时间以避免被准确定位;通过4种不同频率的时钟随机切换来对系统时钟进行扰乱以混淆瞬时功耗。基于CV32E40P处理器实现了该方法并通过相关功耗分析攻击进行实验,实验结果表明得到的最高相关性系数为0.139,比原处理器低0.641,该方法大大提高了处理器的抗功耗分析攻击能力。

In the paper,a method based on randomization to resist power analysis attacks is proposed.Three methods of randomization are adopted in this process:a virtual instruction similar to the previous real instruction is randomly generated and inserted during the execution of the instruction,so that the inserted random power consumption is similar to the real instruction of the previous instruction to avoid accurate power analysis.A random delay is inserted in the stage of instruction execution and write back to confuse instruction execution time to avoid accurate positioning.The system clock is disturbed by random switching of four different frequencies to confuse instantaneous power consumption.The CV32E40P is used to implement this method and the attack experiment is carried out by correlation power analysis attack.The results show that the highest correlation coefficient obtained is 0.139,which is 0.641 lower than that of the original processor.This method greatly improves the capability of the processor to resist power analysis attack.