控制链路延时对LCC-HVDC系统小信号稳定性的影响及机理分析

Impact of Time-Delay on Small Signal Stability of LCC-HVDC System and Its Mechanism Analysis

为研究电网换相换流器高压直流输电(line commutated converter based high voltage direct current,LCC-HVDC)控制链路延时对系统小信号稳定性的影响,首先,建立考虑控制链路延时后的LCC系统小信号模型,包括状态空间模型和单输入单输出反馈控制模型。然后,基于所建立的模型,研究不同交流系统强度下控制链路延时变化时系统的根轨迹移动特征,获得主导模态的振荡频率,定量评估控制链路延时对系统幅值和相位裕度的影响。最后,研究控制链路延时对系统临界运行短路比和控制参数可行域的影响,揭示控制链路延时、交流系统强度及控制系统之间的相互制约关系及交互作用机理。理论分析和仿真验证结果表明,随着控制链路延时的增加,为保证LCC系统稳定传输额定功率,交流系统强度不能过低;链路延时在一定程度上降低了控制参数的可行域,尤其是在弱系统工况,当LCC控制链路延时较大时,需适当降低定直流电压控制器或锁相环(phase-locked-loop,PLL)的带宽来保证系统稳定。

To investigate the effects of time-delay from control link on the small signal stability of the line commutated converter based high voltage direct current(LCC-HVDC)system,this paper developed the small signal models for the LCC system considering the time-delay,including the state space model and the single-input single-output(SISO)feedback control model.Then,based on the established models,the moving feature of the eigenvalue locus with varying time-delay under different AC system strength was analyzed,the oscillation frequency of the dominant mode was obtained,and the impacts of time-delay on the gain margin(GM)and phase margin(PM)were quantitatively evaluated.Finally,the influence of time-delay on the critical short circuit ratio(CSCR)and the feasible region of the control parameters were studied,and the mutual restriction and interaction mechanism of the delay,AC system strength and control system were revealed.Theoretical analysis and simulation results show that,to ensure the rated power transferred by LCC system with the increase of delay,the strength of AC system should be enhanced.Moreover,time-delay reduces the feasible region of control parameters to a certain extent,especially under weak AC system conditions,therefore,it is necessary to reduce the bandwidth of constant DC voltage controller or phase-locked-loop(PLL)to ensure the system stability when the time-delay is large.