一种低成本的四节点翻转自恢复锁存器设计

Design of a Low-Cost Quadruple-Node-Upset Self-recovery Latch

为了有效地容忍软错误,本文基于32nm CMOS工艺提出了一种低成本的四节点翻转自恢复锁存器(LCQNUSRL)。该锁存器由24个C单元构成,形成6×4的阵列结构,构建了四级过滤的容错机制。当锁存器内部任意四个节点发生翻转,经过C单元的阻塞后,该锁存器可自行恢复到正确值。采用HSPICE进行实验表明,与三个锁存器(LCTNURL,TNURL,LC-TSL)平均值相比功耗降低了32.94%,延迟降低了30.2%,功耗延迟积(power delay product,PDP)降低了53.35%,晶体管数量增加了25%,使用较多的晶体管实现了QNUs自恢复,有着更高的可靠性。此外,所提出的锁存器对电压和温度的变化不敏感。

To effectively tolerate soft errors,this paper proposes a Low-Cost Quadruple-Node-Upset Self-Recovery Latch(LCQNUSRL)based on 32nm CMOS technology.The latch is composed of 24 C-elements,forming a 6×4 array structure and constructing a fault tolerance mechanism of four-stage filtering.When any four nodes inside the latch are upset,the latch can restore to the correct value by itself after blocking by C-elements.HSPICE experiment shows that compared with the average value of three latches(LCTNURL,TNURL,LC-TSL),its power consumption is reduced by 32.94%,the delay is reduced by 30.2%,and the power delay product(PDP)is reduced by 53.35%.The number of transistors increased by 25%,and more transistors were used to achieve QNUs self-recovery with higher reliability.In addition,the proposed latch is insensitive to voltage and temperature changes.