摘要
数字签核是帮助数字芯片设计者确保开发产品的功能性和完备性的工具,由于先进工艺数字芯片流片费用极为昂贵,流片前签核的重要性越来越高。本文介绍了数字签核的两个关键环节时序和噪声验证,具体阐述了时序和噪声验证环节的核心挑战、关键技术和基本流程,并就新兴技术的结合进行详细讨论。
Digtal IC sign off tools are used to help digital designers guarantee product functionality and completeness.Due to the tremendous expense of digital tape out at advanced technologies,it has become more critical than ever to complete sign off before the tape out.This paper discusses two key stages of timing and power supply noise verification for digital IC sign off,from challenges,key techniques,procedures to the integration with new techniques.
作者
卓成
郭资政
董晓
贺青
林亦波
ZHUO Cheng;GUO Zizheng;DONG Xiao;HE Qing;LIN Yibo(College of Informaiton Science&Electronic Engineering,Zhejiang University,Hangzhou 310027,China;Department of Computer Science&Technology,Peking University,Beijing 100000,China;College of Electronic and Information Engineering,Tongji University,Shanghai 200092,China)
出处
《微纳电子与智能制造》
2021年第2期1-10,共10页
Micro/nano Electronics and Intelligent Manufacturing
基金
浙江省重点研发计划(2020C01052)
国家自然科学基金(62034007,62004006,61974133)项目资助
