一种三阶混合结构的噪声整形SAR ADC

A Third-Order Hybrid Structure Noise-Shaping SAR ADC

设计了一种三阶噪声整形逐次逼近模数转换器。该转换器采用由二阶误差反馈结构和一阶级联积分器前馈结构组成的混合噪声整形结构,通过该混合结构来控制反馈余量并提升噪声传输函数的阶数,通过基于共模的开关切换方式优化了比较器动态失调电压,实现了三阶噪声传输函数。该电路基于0.35μm CMOS工艺进行设计仿真。使用3.3 V电源电压进行供电,在2 MS/s采样频率以及8倍过采样率下,功耗为1.87 mW,实现了87.93 dB的SNDR,有效位数(ENOB)为14.3 bit,在传统8位SAR ADC的基础上提升了有效位数6.3 bit。

A third-order hybrid structure noise-shaping(NS)successive approximation register(SAR)analog-to-digital converter(ADC)was designed.The hybrid structure consisted of two stage,a cascaded integrator feed-forward(CIFF)stage and a second-order error feedback(EF)stage.This structure was used to control the feedback residue and enhance the order of the noise transfer function,achieving a three-order noise transfer function.And the Vcm-based switching mode was used to optimize the dynamic offset voltage of comparator.The circuit was designed in a 0.35μm CMOS process.It consumes 1.87 mW power when operating at a 2 MS/s sampling frequency and an oversampling ratio of 8 with a 3.3 V supply.The proposed NS SAR ADC achieves a 87.93 dB SNDR and a 14.3 bit ENOB,enhancing the ENOB by 6.3 bit on the basis of traditional 8-bit SAR ADC.