具有分段P型埋层的Triple-RESURF LDMOS

A Triple-RESURF LDMOS with Segmented P Buried Layer

提出了一种具有分段P型埋层的Triple-RESURF LDMOS(SETR LDMOS)。该结构将传统Triple-RESURF LDMOS(TR LDMOS)中均匀掺杂的P埋层漏端一侧做分段处理,使漂移区中P型杂质从源端到漏端呈现出近似阶梯掺杂的分布。这种优化能够平衡漏端底部剧烈的衬底辅助耗尽效应,提升器件的耐压性能;同时,器件正向导通状态下,对电流的传输路径也没有形成阻碍,能够维持较低的比导通电阻。流片结果表明,在漂移区长度均为65μm的情况下,SETR LDMOS的击穿电压能达到813 V,比传统TR LDMOS的击穿电压高51 V,且比导通电阻维持在7.3Ω·mm^(2)。

A Triple-RESURF LDMOS(TR LDMOS)with segmented P buried layer(SETR LDMOS)is proposed.This structure cut the uniformly doped P buried layer of drain side in the traditional TR LDMOS,and the P-type impurities in the drift region presented a nearly stepped doping distribution from the source to the drain side.This optimization could balance the severe substrate-assisted depletion effect at the bottom of the drain terminal,and improve the breakdown voltage of the device.At the same time,when the device turned on,current transmission path was not obstructed,maintaining a low specific on-resistance.The tape-out results show that the breakdown voltage of SETR LDMOS can reach 813Vwith the same drift region length of 65μm.Compared with TR LDMOS,the breakdown voltage of SETR LDMOS is increased by 51V,with the same specific on-resistance of 7.3Ω·mm^(2).