期刊文献+

一种LDO自适应电流频率补偿技术

An Adaptive Current Frequency Compensation Technology for LDO
下载PDF
导出
摘要 为解决LDO稳定性高度依赖负载电容和ESR零点补偿可靠性差的问题,提出了一种宽负载电流范围下(0~1 A)自适应电流频率补偿技术。通过分段电流补偿设计了轻重载下动态极点和独立阻抗,在优化环路稳定性的同时,进一步减小了静态功耗;通过阻容网络信号叠加产生了随负载电流和电容变化的动态零点。经仿真及流片验证,全负载范围内最差相位裕度为55°;可空载,且空载下静态功耗仅为52.3μA;适用负载电容范围≥2.2μF,ESR范围≤1Ω。该环路具有高稳定性和宽负载电容适应性。在应对负载突变时恢复曲线平滑,无欠阻尼振荡现象。 To solve the problem that LDO stability is highly dependent on load capacitance and poor reliability of ESR zero compensation,an adaptive current frequency compensation technique is proposed for wide load current range(0~1 A).The dynamic pole and independent impedance were designed by piecewise current compensation under light and heavy load,which not only optimized the stability of the loop,but further reduced the quiescent dissipation.The dynamic zero point varying with load current and capacitance was generated by the signal superposition of the resistive and capacitive network.Through the simulation and tape-out verification,the worst phase margin is 55°in the range of full load.The LDO can be unloaded,and the quiescent dissipation is only 52.3μA under no-load,the load capacitance range is more than 2.2μF,and the ESR range is less than 1Ω.The loop has high stability and wide capacitive load adaptability.When the load changes suddenly,the recovery curve of LDO is smooth,and no under-damped oscillation phenomenon occurs.
作者 邱鑫 姚思远 刘智 葛梅 QIU Xin;YAO Siyuan;LIU Zhi;GE Mei(Xi’an Microelectronics Technology Institute,Xi’an 710054,P.R.China;Laboratory of Science and Technology on Radiation-Hardened Integrated Circuits,Xi’an 710054,P.R.China)
出处 《微电子学》 CAS 北大核心 2022年第6期948-954,共7页 Microelectronics
基金 钱学森青年基金资助项目(201977101)
关键词 低压差线性稳压器 频率补偿 自适应 高稳定性 low dropout linear regulator(LDO) frequency compensation adaptive high stability
  • 相关文献

参考文献5

二级参考文献19

  • 1Shi C L, Walker B C, Zeisel E, et al. A highly integrated power management IC for advanced mobile applications. IEEE J Solid- State Circuits, 2007, 42(8): 1723.
  • 2Rincon-Mora G A, Allen P E. A low-voltage, low quiescent eurrent, low drop-out regulator. IEEE J Solid-State Circuits, 1998, 33(1): 36.
  • 3Leung K N, Mok P K T, Lau S K. A low-voltage CMOS low- dropout regulator with enhanced loop response. IEEE Symposium on Circuits and Systems, Vancouver, 2004, 1:385.
  • 4Al-Shyoukh M, Lee H, Perez R A. Transient-enhanced low- quiescent current low-dropout regulator with buffer impedance attenuation. IEEE J Solid-State Circuits, 2007, 42(8): 1732.
  • 5Lau S K, Leung K N, Mok P K T. Analysis of low-dropout regulator topologies for low-voltage regulation. IEEE International Conference on Electronic Device and Solid-state Circuits, Hong Kong, 2003:379.
  • 6Leung K N, Mok P K T. A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation. IEEE J Solid-State Circuits, 2003, 38(10): 1691.
  • 7Lau S K, Mok P K T, Leung K N. A low-dropout regulator for SoC with Q-reduction. IEEE J Solid-State Circuits, 2007, 42(3): 658.
  • 8Miliken R J, Silva-Martinez J, Sanchez-Sinencio E. Full on-chip CMOS low-dropout voltage regulator. IEEE Trans Circuit Syst 1, 2007, 54(9): 1879.
  • 9Ahuja B K. An improved frequency compensation technique for CMOS operational amplifiers. IEEE J Solid-State Circuits, 1983, 18(6): 629.
  • 10Lee H, Mok P K T. Active-feedback frequency-compensation technique for low-power multistage amplifiers. IEEE J Solid- State Circuits, 2003, 38(3): 511.

共引文献9

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部