用于12位250 MS/s电荷域ADC的2.5位子级电路

A 2.5 bit Sub-Stage Circuit for 12 bit 250 MS/s Charge Domain ADC

提出了一种用于12位250 MS/s电荷域流水线模数转换器(ADC)的2.5位子级电路。采用增强型电荷传输电路,实现电荷传输和余量电荷计算,省去了传统流水线ADC中的高性能运放,大幅降低了ADC的功耗。该2.5位子级电路被应用于一种12位250 MS/s电荷域流水线ADC中,并采用0.18μm CMOS工艺实现。测试结果表明,在250 MS/s采样率、20.1 MHz输入频率下,该ADC的SNR为65.3 dBFS。

A 2.5-bit sub-stage circuit for 12-bit 250 MS/s charge domain pipelined ADCs was presented.Charge transfer and residue charge calculation were realized with boosted charge transfer(BCT)circuit in the proposed 2.5-bit sub-stage.Therefore,the high performance opamps in traditional pipelined ADCs were eliminated,and the power consumption could be reduced remarkably.The proposed 2.5-bit sub-stage circuit had been used in a 12-bit 250 MS/s charge domain pipelined ADC and realized in a 0.18μm CMOS technology.Measurement results showed that the ADC achieved a signal-to-noise ratio(SNR)of 65.3 dBFS under a sampling frequency of 250 MHz with a sinusoid input frequency of 20.1 MHz.