摘要
基于40nm CMOS工艺平台,设计了MOS器件的版图结构,根据去嵌方法设计了测试结构。基于器件寄生因素及物理效应的分析,提出器件的射频子电路模型,提出模型中各参数的提取流程。模型在0~60GHz范围内与测试数据一致性良好。以测试数据评估器件性能,最大截止频率超过200GHz。
Based on the 40 nm CMOS process platform,the layout of MOS device is designed,and the test key is implementedaccording to the de-embedding method.On the basis of the analysis of the parasitic factors and physical effects of the device,the RF subcircuit model of the device is proposed,and the extraction method of each parameter in the model is given.The model is consistent with the test data in the range of 0 to 60 GHz.The performance of the device is evaluated based on test data,the maximum cut-off frequency is over 200 GHz.
作者
刘林林
LIU Linlin(Shanghai IC R&D Center Co.,Ltd.,Shanghai 201210,China)
出处
《电子技术(上海)》
2021年第7期11-13,共3页
Electronic Technology
基金
上海科技企业技术创新课题项目