摘要
针对早期的频率计采用分立元件设计中周期长、稳定性差,并且成品体积大、功耗高,提出了一种以现场可编程逻辑门阵列FPGA为核心,基于等精度测量频率的原理,利用Verilog硬件描述语言设计实现了频率计功能。采用MPC5634单片机与FPGA通信,将得到的数据运算处理,利用液晶显示器LCD1602对测量的频率、占空比、时间间隔等实时显示,充分发挥FPGA的高速数据采集能力和单片机的高效计算与控制能力,使两者有机地结合起来。重点介绍了频率信号采集的硬件组成结构和软件设计流程。实验结果表明,经过整体测试流程,可以满足高频、高精度的测频要求,并大大降低功耗。
Aiming at the early frequency meter using discrete component design with long period,poor stability,large volume and high power consumption,a field programmable logic gate array FPGA as the core,based on the principle of measuring frequency with equal precision,using Verilog The hardware description language is designed to realize the frequency meter function.Adopt MPC5634 single chip microcomputer to communicate with FPGA,and process the obtained data calculation,use LCD1602 to display the measured frequency,duty cycle,time interval and other real-time display,give full play to the high-speed data acquisition capability of FPGA and the efficient calculation and control capabilities of single chip microcomputer.Organically combine the two.The hardware structure and software design process of frequency signal acquisition are mainly introduced.The experimental results show that the overall test process can meet the high-frequency,high-precision frequency measurement requirements,and greatly reduce power consumption.
作者
刘源
张磊
徐叔喜
汪健
LIU Yuan;ZHANG Lei;XU Shuxi;WANG Jian(R&D Centerin Suzhou,214 Institute of China North Industries,Jiangsu 215163,China)
出处
《电子技术(上海)》
2020年第2期28-31,共4页
Electronic Technology
基金
江苏省科技企业科技创新课题项目。
关键词
集成电路
频率计
FPGA
等精度测量
占空比
耦合
integrated circuit
frequency meter
FPGA
equal precision measurement
duty cycle
coupling