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基于CMOS图像传感器的CSP封装优化研究

Study on Optimization of Chip Scale Package for CMOS Image Sensor
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摘要 晶圆级芯片封装在CMOS图像传感器芯片中有重要意义,可以降低成本,减小尺寸。但晶圆级封装玻璃与衬底之间的键合过程存在困难与挑战。为了达到更好的封装效果,我们针对封装玻璃与晶圆衬底间的支撑柱结构进行优化,设计了多种不同的支撑柱结构,并在晶圆上进行封装实验。实验结果表明,在芯片上使用与不使用抗反射氧化层的条件下,当支撑柱结构分别具有较小的独立结构面积,和较大的接触面积时,能够达到较高的封装良率。此外,内圈多圈支撑柱结构在两种条件下均能有较好的封装良率。 Wafer level chip scale package play an important role in the fabrication of CMOS image sensor,which could reduce the cost and decrease the chip size.But the yield of WLCSP suffers from the bonding process between sealing glass and wafer substrate.In order to improve the package,we make optimization on dam between the sealing glass and wafer substrate,and design different dam scheme.Many experiments were conducted,and the results showed that the yield of WLCSP could be enhanced when the dam consist of smaller independent structure for CIS chip with LTO,and when the dam consist of large structure area for CIS chip without LTO.Moreover,the dam with multi-cycle could improve the packaging yield for CIS chip with and without LTO.
作者 石文杰 SHI Wenjie(SmartSens Technology Co.,Ltd,Shanghai 200233,China)
出处 《电子技术(上海)》 2019年第1期37-39,共3页 Electronic Technology
基金 上海市中小企业技术创新课题项目.
关键词 集成电路制造 晶圆级芯片封装 封装玻璃支撑柱 抗反射氧化层 IC manufacturing wafer level chip scale package sealing glass dam LTO
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