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缓存侧信道攻击下硬件事件特征分析

Analysis of hardware event characteristics under cache side channel attacks
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摘要 基于硬件事件的异常检测是当前防御缓存侧信道攻击的主要手段之一。然而,现有防御机制普遍未考虑攻击者主动隐藏特征时的检测准确度。本文指出可行的侧信道攻击需要满足不可或缺的驱逐操作和严格的攻击频率这两个先决条件,并发现这些攻击约束会导致被攻击的缓存组访问量急剧增加。实验结果表明,相比于SPEC基准程序,侧信道攻击至少会导致2.61倍的访问量。 Abnormal detection based on hardware events is one of the main means of defending against cache side channel attacks.However,existing defense mechanisms generally do not take into account the detection veracity when attackers actively hide features.This paper points out that feasible side channel attacks require meeting two prerequisites of indispensable eviction operations and strict attack frequency,and finds that these constraints lead to a sharp increase in accesses to the attacked cache set.Compared to the SPEC benchmarks,experiments show that side channel attacks result in at least 2.61 times set accesses.
作者 王楷 郭涛 季振洲 WANG Kai;GUO Tao;JI Zhenzhou(School of Computer Science and Technology,Harbin Institute of Technology,Harbin 150001,China;Network and Information Center,Harbin Institute of Technology,Harbin 150001,China)
出处 《智能计算机与应用》 2021年第10期1-4,共4页 Intelligent Computer and Applications
基金 国家重点研发计划“工控系统安全可信关键技术及应用”重点专项(2020YFB2009500)
关键词 系统结构 硬件安全 缓存 侧信道攻击 异常检测 system architecture hardware security cache side channel attack anomaly detection
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