摘要
文章提供了一种符合中国数字电视地面广播标准中的前向纠错码BCH-LDPC级联编码器的硬件实现方案。设计充分利用了此LDPC码的G矩阵的准循环特性,在结构、存储空间和时序上得以较大的优化。此结构也具有一定的灵活性,能通过对G矩阵列划分改变其并行度,从而改变速度和面积上的折中。并且通过在控制电路中设定不同的状态跳转条件实现不同码率的编码要求,使编码器大部分模块得到了重用。
A FEC encoder construction is proposed for the digital television terrestrial broadcasting system base on the specification of China. The proposed construction utilizes the quasi-cyclic features of G matrix to achieve high implement efficiency. The parallel degree can easily be adjusted to obtain the best trade-off between silicon area and encoding delay. The folding scheme is also used in the design of the encoder.
出处
《中国集成电路》
2007年第9期30-35,共6页
China lntegrated Circuit