期刊文献+

采用CORDIC流水线结构的FFT处理器的改进 被引量:5

Improvement on FFT processors based on pipelined CORDIC architecture
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摘要 CORDIC流水线结构因其高吞吐率及规整性,而很适合于FFT蝶形运算,但其缺点是耗资源多,本文从FFT中旋转因子固定不任意的特点出发,根据CORDIC基本旋转角度与缩放因子的对应关系和缩放因子之间的转换规律,对CORDIC流水线结构进行了改进,在蝶形运算速度不变的情况下,进一步减少所耗资源,在字长为16位的FFT中,每个旋转因子可用25位的控制序列来替代,从而使每个旋转因子的存储空间由32位减少到25位。 The pipelined CORDIC architecture is very suitable for FFT butterfly operation because of its high throughput and regularity, but it will consume lots of resources,this article presents an improved architecture of CORDIC pipeline,starting with the property that the FFT rotary factor is fixed but not arbitrary,and according to the mapping between the basic rotational angle of CORDIC and scale factor and the rule for transform among the scale factors.On the condition that the velocity of FFT butterfly operation maintains unchanged, the improved architecture not only will economize the resources but also can reduce the store room from 32 bits to 25 bits when the word-length of the system is 16 bits.
出处 《微计算机信息》 北大核心 2007年第3期203-205,共3页 Control & Automation
基金 广东省重大科研专项(基金编号:A1100501)
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参考文献6

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二级参考文献8

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共引文献8

同被引文献22

  • 1李全,陈石平,付佃华.用FPGA实现CORDIC算法的32位浮点三角超越函数之正余弦函数[J].电子产品世界,2006,13(10S):150-151. 被引量:6
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