基于FPGA的高速数据中继器设计

The Design of the Data Relay Device Based on FPGA

本文基于对高速数据中继器功能需求的分析及高速数据处理设计方案的研究,提出了基于FPGA的高速数据中继器的总体设计结构,并着重分析了高速数据中继器实现中的主要技术难点,最后对设计的高速数据中继器进行测试,对测试结果进行了分析。

This paper based on to the high speed data relay function demand analysis and the high speed data processing design pro-posal research,proposed high speed data relay system design structure based on the FPGA,and has emphatically analyzed in the high speed data relay realization main technical difficulty,finally carries on the test to the design high speed data relay,has made the analysis to the test result.