摘要
本文对GPS接收机中伪码跟踪过程建立了数学模型,分析了中频采样时钟对码环跟踪性能的影响。通过动态仿真,模拟了FPGA中码跟踪环在多种条件下(多普勒,环境噪声,初始码相位偏移)的同步与跟踪。理论分析和仿真结果表明,中频采样率直接影响接收机码环的跟踪精度,成为影响码环工作性能的一个重要因素。
In the paper,the mathematic model of pseudorange tracking process is established and the influence of many intermediate frequency samplings on the tracking performance of code loops is analyzed.It also dynamically emulates the synchronization and tracking of DLL on many occasions.It mainly deals with the tracking performance of different intermediate frequency sampling rate in digital GPS receiver tracking loop.
出处
《微计算机信息》
北大核心
2008年第7期157-159,共3页
Control & Automation
关键词
GPS接收机
码环跟踪
伪距
数字中频
GPS receiver
digital delay-locked loop(DLL)
pseudorange
digital intermediate frequency