一种用于THD优化的模拟乘法器设计

Analog Multiplier with THD Optimizer Circuit

为有效地提高有源功率因数校正控制器(APFC)[1]性能,设计了一种用可控电流法实现,可应用于连续/临界型(CCM/DCM)升压(BOOST)模式APFC的模拟乘法器.该乘法器有较好的线性特性,线性范围达到0~3V,与传统方法相比,特别嵌入了总谐波失真(THD)优化电路,从而达到最优化输入电流THD,提高功率因数的目的.最后给出了具体的乘法器电路图和仿真结果.

To improve the performance of active power factor correction (APFC), an analog multiplier for CCM/DCM Boost PFC Pre-regulator is developed.This circuit adopts the theory of control current division. This multiplier can work in a good linear operation range from 0V to 3 V, compared with conventional methods , specially can also correct power factor by reducing the Total Harmonic Distortion (THD) of the AC input current with embedded THD optimize circuit. The detailed circuit and the simulation result are sho...