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片上网络 被引量：2

Networks on Chips
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摘要 半导体技术的飞速发展推动SoCs设计进入到片上网络时代。针对片上网络设计所面临的挑战性难题,提出了一种新的基于组件的分层设计方法。该方法遵循垂直的设计流程,为组件复用以及可靠的网内互连提供了良好的支持。其中详细讨论了片上网络从下到上各个层次设计所面临的问题,并提出了相应的解决策略。最后,简单阐述了片上网络有待研究和解决的问题。 It is meant to be a short introduction to a new paradigm for networks on chip(NOC) design.We refer the interested reader to an extended overview of this problem and to some recent results in this area in industry and academia.The premises are that a component-based design methodology will prevail in the future,to support component re-use in a plug-and-play fashion.At the same time,NOC will have to provide a functionally-correct,reliable operation of the interacting components.The physical interconnections on chip will be a limiting factor for performance and energy consumption.
作者 杨敏华 谷建华 周兴社
机构地区 西北工业大学计算机学院
出处 《微处理机》 2006年第5期28-30,34,共4页 Microprocessors
关键词 片上系统 片上网络 组件 分层设计 SoCs NOC Components Layer-based design
分类号 TP368 [自动化与计算机技术—计算机系统结构]
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参考文献8

  • 1[1]Tang Lei,Shashi Kumar.Algorithms and Tools for Network on Chip Based System Design[J].Proceedings of the 16th Symposium on Integrated Circuits and Systems Design,2003.
  • 2[2]Radu Marculescu.Networks-on-Chip:The Quest for On-Chip Fault-Tolerant Communication[J].Proceeding of the IEEE Computer Society Annual Symposium on VLSI,2003.
  • 3[3]Luca Benini,Giovanni De Micheli.Networks on Chip:A New Paradigm for Systems on Chip Design[J].Proceedings of the 2002 Design,Automation and Test in Europe Conference and Exhibition,2002.
  • 4[4]Z C Yu,S B Furber and L A Plana.An Investigation into the Security of Self-Timed Circuits[J].Proc.9th IEEE Asynchronous Circuits and Systems (Async),IEEE CS Press,Los Alamitos,Calif.,2003.
  • 5[5]ARM Ltd.AMBA,Advanced Microcontroller Bus Architecture Specification[EB/OL].Rev 2.0,May 1999.
  • 6[6]A Hemani,A Jantsch,S Kumar,A Postula,J Oberg,M Millberg,and D Lindqvist.Network on Chip:An architecture for billion transistor era[J].Proc.Of the IEEE NorChip Conference,Nov.2000.
  • 7[7]M Sgroi,et al.Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design[J].Proc.of the 38th Design Automation Conference,Jun.2001.
  • 8[8]W Dally,and B Towles.Route Packets,Not Wires:On-Chip Interconnection Networks[J].Proc.of the Design Automation Conference,Jun.2001.

同被引文献19

  • 1马立伟,孙义和.片上网络拓朴优化:在离散平面上布局与布线[J].电子学报,2007,35(5):906-911. 被引量：8
  • 2卢强,姚放吾.片上网络的分析与设计[J].航空计算技术,2007,37(2):127-130. 被引量：2
  • 3Dally W J,Towles B.Route packets,not wires:on-chip interconnection networks[C]//Proceedings of Design Automation Conference.Las Vegas,Nevada,USA,2001:684-689.
  • 4De Micheli G,Benini L.Networks on chip:A new paradigm for systems on chip design[C]//Proceedings of Design Automation and Test in Europe Conference and Exhibition.Paris,France,2002:418-419.
  • 5Liang J,et al.aSoC:A scalable,single-chip communications architecture[C]//IEEE International Conference on Parallel Architectures and Compilation Techniques.2000:37-46.
  • 6Harmanci M D,et al.Quantitative modelling and comparison of communication schemes to guarantee quality-of-service in networks-on-chip[C]//IEEE International Symposium on Circuits and Systems.2005,2:1782-1785.
  • 7Rijpkema E,Goossens K,Radulescu A,et al.Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip[C]//IEEE Proceedings:Computers and Digital Techniques.2003,1:294-302.
  • 8Chakravorty R,Kar S,Farjami P.End-to-end internet quality of service(QoS):An overview of issues,architectures and frameworks[C]//Proceedings of IEEE Third International Conference on Information Technology.Bhubaneswar,India,2000:1-6.
  • 9Agarwal A,Mustafa M,Pandya A S.QoS driven network-on-chip design for real time systems[C]//Proceedings of Canadian Conference on Electrical and Computer Engineering.2006:1291-1295.
  • 10Kim M,Kim D,Sobelman G E.Network-on-chip quality-of-service through multiprotocol label switching[C]//Proceedings of 2006 IEEE International Symposium on Circuits and Systems.2006:1840-1843.

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微处理机
2006年 第5期

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