基于FPGA技术的16位数字分频器的设计

Design of sixteen bits digital frequency divider based on FPGA

在许多测试、测量电路的设计中,分频器的使用非常频繁.本文介绍一种基于FPGA技术的16位数字分频器的设计方法,该分频器能够对输入的信号在0～65535范围之间进行任意整数倍、等占空比的分频.该分频器具有设计简单、用途广泛、成本低的优点.

In many designs of test and measure circuits,frequency divider is used very continually.This paper presents a design method of sixteen bits digital frequency divider based on FPGA.This divider can divide the input signal's frequency with arbitrary integer and equal duty ratio in the range of 0~65535,which has some merits,such as simple design,comprehensive use and low cost.