一种半实物雷达仿真系统硬件体系结构设计和应用

Design and Application of Modularized Standardized and Scalable Architecture of Radar Signal Processor in Hardware-in-loop Radar-Countermeasure Simulation System

提出了一种模块化、标准化、可扩展的半实物雷达仿真系统硬件体系结构。它可以满足多种雷达对抗仿真的需求,具有一定的通用性和扩展性。作者使用ADSP21060为主处理器,实现了该硬件平台,并在某雷达对抗仿真中得到应用,充分发挥了该硬件体系的优势。

An architecture of hardware structure for the modularized, standardized and scalable simulation system with hardware-in-loop was established. From such architecture, a practical radar countermeasure simulation system was implemented, with ADSP21060 as its core processors, and a fairly reasonable simulation result.