摘要
VLSI的参数成品率是与制造成本和电路特性紧密相关的一个重要因素 ,随着集成电路 (IC)进入超深亚微米发展阶段 ,芯片工作速度不断增加 ,集成度和复杂度提高 ,而工艺容差减小的速度跟不上这种变化 ,因此参数成品率的研究越来越重要 .本文系统地讨论了参数成品率的模型和设计技术研究进展 ,分析不同技术的特点和局限性 .最后提出了超深亚微米 (VDSM)
Parametric Yield of VLSI is an important factor related with manufactory cost and circuit performance.With development of deep sub-micron IC technologies,chips have led to a large increase in system complexity and the number of devices per die as well as the switching speeds.These advances have been accompanied by parametric yield loss due to the fluctuations in the manufactory process.Firstly,models and design technology of parametric yield is systematically discussed in this paper.Their advantages and disadvantages are discussed in details.Finally,the main problems and developing direction of parametric yield design and enhancement in very deep sub-micron regime are given.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2003年第z1期1971-1974,共4页
Acta Electronica Sinica
基金
国家 8 63VLSI重大专项支持研究 (No.2 0 0 3AA1Z1 630 )
