基于VHDL的时延Petri网仿真

Simulation of the Timed Petri Nets Based-on VHDL

在实时控制系统中,常常需要使用时延Petri网对系统进行建模、分析. 作者提出了用硬件描述语言对时延Petri网进行描述,用VHDL语言中的wait语句和after语句来模拟Petri网中的时延特性,通过EDA软件工具对时延Petri网进行仿真,获得系统的动态性能,这为时延Petri网的分析提供了新的路径,并为控制系统的设计和电路实现奠定了基础. 文章最后给出了一个实例,仿真波形表明了这种方法的正确性.

Timed Petri Nets are often used to model and analyze the real time control systems. The authors present a way to describe timed Petri Nets with hardware description language. The timed characteristic of Petri Nets is specified by using the sentences of the wait and after in VHDL and simulated with the EDA software. Then the dynamic properties of the system are obtained. That抯 a new approach to analyze timed Petri Nets. It is the basis to the design and circuit implementation of the control systems. Finally an example is presented and shows the correctness of this method.