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一种低功耗CPU卡的设计 被引量:2

Design of a Low Power CPU Card
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摘要 地址总线的功耗是整个 CPU卡电路系统功耗的重要来源。降低地址总线上的翻转率可以有效降低整个系统的功耗。文章在分析 CMOS电路功耗和几种总线编码的基础上 ,提出了一种改进的 T0 - BI编码 ,并将此种编码应用于 CPU卡用芯片的设计。结果表明 ,采用此种编码可以有效地降低 CPU卡电路的功耗。 The power dissipated by the address bus is the most important power dissipation source of the CPU card Reducing the toggle rate on the address bus can cut down the power of the whole system effectively Based on the analysis of the power dissipation in COMS circuits and the analysis of the known address coding,an advanced T0 BI coding is proposed in the paper,which has been applied to the design of a CPU card It is demonstrated that the system power dissipation of the CPU card has been reduced effectively
出处 《微电子学》 CAS CSCD 北大核心 2002年第5期369-373,共5页 Microelectronics
关键词 地址总线 低功耗 编码 CPU卡 IP核 Address bus Low power Coding CPU card IP Core
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参考文献3

  • 1[1]Benini L,De Micheli G,Macii E,et al. Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems [A]. IEEE 7th Symp VLSI [C]. Urbanna,IL, 1997.77-82.
  • 2[2]Stan M R,Burleson W P. Bus-invert coding for lowpower I/O [J]. IEEE Trans Very Large Scale Integration (VLSI) Systems,1995; 3(1): 49-58.
  • 3[3]Benini L,De Micheli G,Macii E ,et al. Address bus encoding techniques for system-level power optimization[A]. IEEE Design Automation Test Europe [C].Paris ,France. 1998. 861-866.

同被引文献14

  • 1IEEE Std. 802.3. 2000 Edition (Incorporating IEEE Std 802.3, 1998 Edition, IEEE Std 802.3ae-1998, IEEE Std 802.3ab- 1999, and 802.3ad-2000 ).
  • 2IEEE Std. 802.3aeTM -2002(Amendment to IEEE Std.802.3 (Amendment to IEEE Std. 802.3TM-2002).
  • 3ATM Forum Technical Committee.UTOPIA Level 4. AF-PHY-0144.001.
  • 4Do-Yeon Kim, Sang-Min Lee, Chang-Ho Choi, Hae-Won Jung, and Yeong-Seon Kim.Trend of 10 Gigabit Ethernet Switch Development in korea. Proceedings of 2003 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2003 ; 2 ( 28-30 ) : 1032 ~ 1035.
  • 5Hurwitz, J.,Wu-chun Feng. Initial end-to-end performance evaluation of 10-Gigabit Ethernet.Proceedings of llth Symposium on High Performance Interconnects,2003:116-121.
  • 6任艳颖.IC设计基础[M].西安:西安电子科技大学出版社.2001.
  • 7Ramon Canal, Antonio Gonzalez, James E Smith. Very Low Power Pipelines using Significance Compression, Proceedings of the 33rd annua[J]. IEEE/ACM international symposium on Microarchitecture, 2000, 36(2) :184 - 190.
  • 8刘熹,徐子平.UTOPIA接口技术与应用[J].军事通信技术,2001,22(1):50-54. 被引量:1
  • 9孟李林,黄海生.STM-1/STM-4段开销处理ASIC设计[J].半导体技术,2001,26(3):48-50. 被引量:1
  • 10章立生,韩承德,等.SoC芯片设计方法及标准化[J].计算机研究与发展,2002,39(1):1-8. 被引量:17

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