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对称薄膜双栅nMOSFET模型的研究 被引量：1

Modeling of Symmetric Thin-Film Double-Gate nMOSFET's
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摘要 　利用对称薄膜双栅MOSFET在阈值电压附近硅膜中的常电位近似,以硅膜达到体反型时的泊松方程为基础,得到一个有效的双栅nMOS器件模型。考虑到薄膜双栅SOI器件的体反型特性,阈值电压处的表面势不再受限于传统的强反型界限(指2倍费米势),并运用跨导最大变化(TC)法对此模型进行分析,得到阈值电压和阈值电压处表面势的详细表达式;另外,还演示了薄膜双栅MOSFET的近乎完美的亚阈值斜率特性,其数值模拟结果与文献实验结果吻合较好。 An analytical model that is valid near and below threshold is derived for doublegate nMOS devices. The model is based on Poisson's equation, containing both the depletion charges and minority carriers, and constant voltage assumption in vertical silicon layer near the threshold voltage. By using the maximum transconductance change (TC) method, the model provides explicit expressions of the threshold voltage and threshold surface potential, which is no longer pinned at the classical limit of strong inversion due to the volume inversion characteristics of the thinfilm doublegate SOI devices, and the nearly ideal subthreshold slope of thinfilm doublegate MOSFET was demonstrated. Finally, very good agreement with numerical simulations is observed.
作者 叶晖 李伟华
机构地区 东南大学微电子中心
出处 《微电子学》 CAS CSCD 北大核心 2002年第6期419-422,共4页 Microelectronics
关键词 薄膜双栅 MOSFET 器件模型 跨导最大变化法 强反型界限 Thin-film double-gate MOSFET Model device Maximum transconductance change method Strong inversion limit
分类号 TN386 [电子电信—物理电子学]
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参考文献10

  • 1[1]Balestra F, Cristoloveanu S, Benachir M, et al. Dou ble-gate silicon-on-insulator transistor with volume inversion: a new device with greatly enhanced performance [J]. IEEE Elec Dev Lett, 1987; 8(9): 410-412.
  • 2[2]Colinge J P(著),武国英(译).SOI技术-21世纪的硅集成电路技术[M].北京:科学出版社.
  • 3[3]Venkatesan S, Neudeck G W, Pierret R F. Dual-gate operation and volume inversion in n-channel SOIMOSFET's [J]. IEEE Elec Dev Lett, 1992; 13(1): 44-46.
  • 4[4]Hisamoto D, Kaga T, Takeda E. Impact of the verti cal SOI 'DELTA' structure on planar device technolo gy [J]. IEEE Trans Elec Dev,1991; 38 (6): 1419- 1424.
  • 5[5]Schubert M, Hofflinger B, Zingg R P. An analytical model for strongly inverted and accumulated silicon films [J]. Sol Sta Elec,1990;33 (12) :1553-1568.
  • 6[6]Ortiz-Conde A, Garcia Sanchez F J. The foundation of a charge-sheet model for the thin-film MOSFET[J]. Sol Sta Elec,1988;31(10): 1497-1500.
  • 7[7]Mazhari B, Cristoloveanu D E, loannou A L. Proper ties of ultra-thin wafer-bonded silicon-on-insulator MOSFET's [J]. IEEE Trans Elec Dev, 1991; 38(6): 1289-1295.
  • 8陈占平,魏丽琼,许铭真,谭长华,王阳元.通用薄膜双栅SOI　MOSFET电流模型[J].Journal of Semiconductors,1996,17(10):729-734. 被引量：7
  • 9[9]Suzuki K, Tanaka T, Horie H, et al. Analytical sur face potential expression for thin-film double-gate SOI MOSFET's [J]. Sol Sta Elec, 1994; 37(2): 327-332.
  • 10[10]Wong H-S, White M H, Krutsick T J. Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's [J]. Sol Sta Elec, 1987; 30(9): 953-968.

共引文献6

同被引文献11

  • 1方圆,张悦,李伟华.薄膜双栅MOSFET体反型现象的研究[J].微电子学,2005,35(3):270-274. 被引量：1
  • 2冯耀兰,翟书兵.宽温区（27～300℃）MOS器件高温特性的模拟[J].电子器件,1995,18(4):234-238. 被引量：8
  • 3Draper B L,Palmer D W. Extension of high temperature electronics[J]. IEEE Trans Components Hybrids Manufacturing Technology,1979,CHMT-2(4) : 399-404.
  • 4Shoucair F S. High-temperature latch-up characteristics in VLSI CMOS circuits. IEEE Trans Electron Devices[J]. 1988,ED-35 (12):2424-2426.
  • 5Venkatesan S, Neudeek G W, Pierret R F. Dual-gate operation and volume inversion in n-channel SOl MOSFET's [J]. IEEE Elec Dev Lett,1992,13 (1):44-46.
  • 6Hisamoto D, Kaga T, Takeda E. Impact of the vertical SOI "DELTA" structure on planar device technology [J]. IEEE Trans Elee Dev, 1991,38 (6) : 1419-1424.
  • 7Ahmed S, Alam M K, Rabbi M G, et al. Quantum mechanical study of gate leakage current in double gate MOS structuresr[C]//ISDRS 2007, December 12-14, 2007, College Park, MD, USA, 2007 : 1-2.
  • 8Ge L X, Fossum J G. Analytical modeling of quantization and volume inversion in thin Si-film DG MOSFETs[J]. IEEE Trans Elec Dev,2002,49 (2): 287-293.
  • 9Lopez-Villanueva J A, Cartujo-Cassinello P, Gamiz F, et al. Effects of the inversion-layer centroid on the performance of double-gate MOSFETs[J]. IEEE Trans Elec Dev, 2000, 47 (1):141-146.
  • 10Arnold E, Letavic T, Merchant S, et al. High-temperature performance SOI and bulk-silicon RESURF LDMOS transistors[C]//Proceedings of 8th International Symposium on Power Semiconductor Device and ICs, ISPSD' 96, Maui HI, 1996 : 93-96.

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微电子学
2002年 第6期

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