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Si_3N_4栅MOS器件的隧穿电流模拟 被引量:2

Simulation of Direct Tunneling Current in MOSFET with Si_3N_4 Gate
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摘要  随着MOS器件尺寸按比例缩小到亚100nm时代,栅绝缘层直接隧穿(DirectTunnel-ing,DT)电流逐渐增大。使用Si3N4材料作为栅介质,利用其介电常数高于SiO2的特性,可以在一定时期内有效地解决隧穿电流的问题。文章在二维器件模拟软件PISCES-II中首次添加了模拟高k材料MOS晶体管的器件模型,并对SiO2和Si3N4栅MOS晶体管的器件特性进行了模拟比较。 With MOSFET's rapidly scaling down to the limit of 100 nm, the direct tunneling (DT) current is increasing. Si3N4 has a higher dielectric constant, k, than that of SiO2. New model and material parameters were added to 2D device simulator PISCESII. Simulations of SiO2 gate and Si3N4 gate transistors show that Si3N4 can effectively decrease the DT current, and so, it is a better material for MOSFET's gate.
作者 陈震 向采兰
出处 《微电子学》 CAS CSCD 北大核心 2002年第6期428-430,共3页 Microelectronics
基金 国家重点基础研究项目(GG200036502)
关键词 器件模拟 MOS器件 隧穿电流 氮化硅 Device simulation MOSFET Direct tunneling current Si_3N_4
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参考文献5

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  • 1王伟,孙建平,顾宁.纳米级MOSFET隧穿栅电流量子模型[J].微电子学,2006,36(5):622-625. 被引量:1
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