摘要
针对通用的粗、细粒度可重构基核存在的配置速度、资源利用率等问题,以数字信号处理的基本运算——乘加运算为基础提出一种可实现多种数字信号处理算法的可重构基核单元.通过仿真对该基核的性能进行验证和分析,并以FIR滤波器和FFT算法为例分析该基核实现数字信号处理算法的方案.结果表明该基核具有一定的设计参考价值.
Based on multiply-add operation this paper proposes a kind of reconfigurable cells that can realize a variety of digital signal processing algorithm in an attempt to solve such problems as speed of configuration,utilization rate of resources and so on of coarse-gained and fine-grained reconfigurable cells.The performance of the cells are tested and analyzed by simulation.The ways of their realization are analyzed with FIR filter and FFT algorithm as examples.The result shows that the cells are of reference ...
出处
《微电子学与计算机》
CSCD
北大核心
2009年第3期56-59,共4页
Microelectronics & Computer
基金
国家自然科学基金项目(60676014)
关键词
数字信号处理
可重构
基核
digital single processing
reconfigurable
cells
