摘要
在高速逻辑设计中,需要考虑避免出现振铃、串扰等传输线现象.就此,详细讨论了在Ultra2 SCSI单端和差分模式兼容下PCB的两种输出阻抗及其与连接电缆的阻抗匹配问题的解决方法,简单介绍了在这样的高速逻辑系统中,PCB设计通常要考虑的一些其它问题.
In design for high-speed logic, we should dispose the appearance of transmission line. This paper goes into particulars that a universal backplane for Ultra2 SCSI needs to have a differential output impedance that is comparable to the cable differential and single-ended impedance. And some general guidelines for laying out the PCB are presented.
出处
《装备指挥技术学院学报》
2000年第4期63-66,共4页
Journal of the Academy of Equipment Command & Technology
