90nm技术节点硅栅的干法刻蚀工艺研究

Study on Dry Etching Process of Polycrystalline Silicon Gate for 90 nm Technology Node

进入90 nm工艺节点以后,在等离子体干法刻蚀工艺中出现了越来越多需要解决的技术性问题,带有图形的晶片(相对于白片而言)上的膜层结构设计和刻蚀工艺参数的优化技术变得越来越重要。重点以具有栅氧化层、多晶硅层、二氧化硅和氮氧化硅复合硬掩膜层的典型结构图形晶片为基础,开展应用于90 nm技术节点的多晶硅栅的刻蚀工艺的研发,深入分析了氯气、溴化氢和氧气等反应气体在工艺中的作用,优化了工艺参数,得到了满足90 nm技术节点工艺要求的刻蚀结果。

Since 90 nm process technology node,more and more technical problems appear in plasma dry etching process and the design of the film structures with patterns and the optimization of the process parameters become more and more important.The etching process for the 90 nm polycrystalline silicon gate was developed on the bases of a given layer stack pattern wafer with a hard-mask consisting of oxidation layer,polycrystalline silicon,SiO2 and SiON.After the effects of reaction gases such as Cl2,HBr and O2 on the dry etching were analyzed and the process parameters were optimized,a dry etching process for the requirement of the 90 nm technology node was obtained.