期刊文献+

一种新型的全局互连结构及其加工方法

A Novel Global Interconnects Structure and Its Fabrication
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摘要 随着特征尺寸的缩小,互连成为制约集成电路性能提高和成本下降的主要因素。为了降低互连延迟,提出了一种全新的全局互连结构,即利用掩膜电镀和CMP技术形成三维的铜互连结构,再利用牺牲层技术将三维结构镂空,得到悬空的全局互连结构。该结构可大大地降低全局互连对延迟的影响。 A technology for micro-fabrication freestanding structure in three-dimensions global interconnects was presented.The three-dimensions copper interconnects were fabricated by electrolytic photoetching and following chemical mechanical polish,finally the three dimensions copper structure was released by removing the sacrifice layer.It is demonstrated that freestanding structure has the potential to greatly reduce the capacitance in the global interconnect.
出处 《微细加工技术》 2007年第6期45-47,共3页 Microfabrication Technology
基金 上海市纳米专项资助(0552nm043) 上海市AM基金资助(0511) 微米纳米加工技术国家级重点实验室基金资助(9140C790310060C79)
关键词 全局互连 牺牲层 镂空结构 CMP global interconnect sacrifice layer freestanding structure CMP
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参考文献5

  • 1[1]ITRS.International Technology Roadmap for Semico nductors (ITRS)[S].USA:San Jose,2001.
  • 2翁寿松.铜互连及其相关工艺[J].微纳电子技术,2004,41(3):14-16. 被引量:11
  • 3[3]FayoHe M,Passemard G,Assous M,et al.Integration of copper with an organic low-k dielectric in 0.12 mm node interconnect[J].Microelectronic Engineering,2002,(60):119-124.
  • 4[4]Uno S,Noguehi J,Ashihara H,et al.Dual damascene pro cess for air-gap Cu interconnect using conventional CVD mms as sacrificial hyem[A].Proceedings of the IEEE 2005 International Interconnect Technology Conference[C].California:IEEE,2005.174-176.
  • 5[6]Wong S C,Lee G Y,Ma D J,et al.Modeling of interc onnect capacitance,delay,and crosstalk in VLSI[J].IEEE Transactions on Semiconductor Manufacturing,2000.13(1):108-111.

二级参考文献12

  • 1[8]LI Y Z. Abrasive particle innovation for copper CMP [A] .SEMICON R China 2003 CMP Technical Symposium [ C] .Beijing: 2003.3.
  • 2[9]LIM J H. Development and application of the slurry including colloidal silica and hydrogen peroxide for copper CMP [A] .SEMICON R China 2003 CMP Technical Symposium [ C] .Beijing: 2003.142.
  • 3[10]KONNO T. Specially designed abrasive for Cu CMP slurry[A]. SEMICON R China 2003 CMP Technical Symposium[C].Beijing: 2003.131.
  • 4[11]INA K. New solution path for Cu/low-K CMP process for a low cost of ownership [A] . SEMICON R China 2003 CMP Technical Symposium [C] . Beijing: 2003.113.
  • 5[12]SMALL R, CHELLE P. Post CMP cleaning for copper, STI and Tungsten [A] . SEMICON R China 2003 CMP Technical Symposium [C] . Beijing: 2003.22.
  • 6[2]TSUJIMURA M. Nanotopgraphy effects on CMP process [A] .SEMICONR China 2003 CMP Technical Symposium [C] .Beijing: 2003.66.
  • 7PETERS L.日立研究晶圆背面的污染问题[J].电子制造(中国),2003,(5-6):32.
  • 8[6]WU G W, WEST T E. Hard porous pad for Cu CMP [A] .SEMICONR China 2003 CMP Technical Symposium [ C] .Beijing: 2003.95.
  • 9翁寿松.铜布线及其设备[J].电子工业专用设备,1999,28(3):13-15. 被引量:8
  • 10童志义.CMP设备市场及技术现状[J].电子工业专用设备,2000,29(4):11-18. 被引量:6

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