用现场可编程门阵列进行VLSI设计验证

Using on the spot-programmable logic arrays to verify VLSI design

超大规模专用集成芯片的设计是一项比较复杂的工作。常规的设计方法成功率较低 ,利用 EDA (电子设计自动化 )技术在在线可编程逻辑器件上进行大规模集成电路 ( VL SI)设计验证 ,是超大规模集成电路设计较成功的方法 ,本文对该方法的可行性进行了分析 ,并提出了验证方法。

The design of VLSI (Very Large Scale Integration Circuits) chip is a very complex work. General design methods are not all suitable to solve specific problems. Using programmable logical units, through the application of EDA technology to design VLSI is an ideal design method. The feasibility of this method and the method verification technique are given.