SOC设计中多bits数据跨时钟域的解决方法

The Methodologies for Groups of Signals Cross Clock Domains in SOC Design

在SOC(System On Chip)设计中,随着数字系统复杂性的提高,系统芯片中集成了越来越多的模块,这些模块通常工作在不同的时钟频率下.各控制器或者模块之间进行数据访问时,需要在将多bits数据同步到不同的时钟下.从跨时钟域时异步信号带来的亚稳态问题及其造成的影响,提出了包括握手信号和FIFO等针对不同的异步信号传输进行不同的跨时钟设计.

In SOC design,digital design are increasingly sophisticated;having multiple clocks driving different circuits and circuits that must reliably communicate with each other.This paper explores the fundamentals of signal synchronization and demonstrates circuits a designer can used to handle signals that cross clock domains.It examines design methodologies include handshake and FIFO design for synchronizing groups of signals including data busses that cross clock domains.