一个符合IEEE802.11a标准的新颖FFT/IFFT处理器设计

Design of A Novel FFT/IFFT Processor for IEEE 802.11a

本文提出了一种新颖的FFT/IFFT处理器结构 ,并用可编程逻辑器件 (CPLD)实现了该结构 .这种新型结构有效地结合了传统流水线结构和循环结构的优点 ,并恰当地满足了 80 2 .11a[1] 协议要求的速率 ,达到了实现面积远小于其它结构的目的 .在本文中 ,用CPLD分别实现了这种新型结构和传统流水线结构 。

A novel architecture is proposed to implement FFT/IFFT processor with CPLD devices. The new architecture combines the traditional pipeline structure with recycled structure effectively and meets the requirement of 802.11 a[1] standard. Especially, it utilizes far fewer logic cells than other architectures. In order to verify the efficiency of the proposed structure, we implement the proposed structure and the traditional pipeline structure with CPLD devices separately, and the experimental results show that the proposed structure hereof has superiority in application.