三维CMOS集成电路技术研究

Study on Three-Dimensional CMOSIntegrated Circuits

论述了三维集成电路(3D IC )的发展概况,介绍了近几年国外发展的各种三维集成电路技术,主要包括再结晶技术、埋层结构技术、选择性外延过生长技术和键合技术。并基于 SiGe 材料特性,提出了一种新型的 Si-SiGe 三维 CMOS 结构,即将第一层器件(Si nMOS)做在 SOI(Si on insulator)材料上,接着利用 SiO2/SiO2低温直接键合的方法形成第二层器件的有源层,然后做第二层器件(SiGe pMOS),最终形成完整的三维 CMOS结构。与目前所报道的 Si 基三维集成电路相比,该电路特性明显提高。

This paper presents the development and significant virtues of the Three-Dimensional Integrated Circuits (3D IC). It can reduce the length of an interconnect wire, which results in the reduction of the chip area, increases velocity of the circuit and decreases the power dissipation. A new structure is put forward to fabricate 3D CMOS IC, which uses SOI (silicon-on-insulator) as the material of the first device layer and SiGe-on-insulator as the second device layer. In the assemble of both layers, by the Low-temperature direct bonding, SiGe /Si 3D CMOS IC performs better than Si 3D CMOS does..