期刊文献+

快速以太网卡数模混合自适应均衡器

Design and implementation of mixed-signal adaptive equalizer in fast ethernet NIC integrated circuit
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摘要 提出了一种快速以太网卡芯片数模混合自适应均衡器的体系结构。该结构采用Sign SignLMS算法 ,可有效地补偿双绞线传输的损耗 ,消除向前码间干扰 ;由于采用数模混合电路结构 ,无需高速A/D转换器和数字乘法器 ,降低了功耗和缩小了芯片面积。该自适应均衡器已经过TSMC 0 35 μM 1P5MCMOS工艺验证。 This thesis presents an adaptive equalizer architecture in fast ethernet NIC integrated circuit. Sign-Sign LMS algorithm is adopted to efficiently compensates the twisted pair loss and cancel intersymbol interface. Mixed-signal implementation eliminates the need for 125Mb/s A/D converters and digital multipliers, which reduce the power and chip area. The adaptive equalizer has been verified by TSMC CMOS 0.35 1P5M process.
出处 《系统工程与电子技术》 EI CSCD 北大核心 2004年第7期883-886,共4页 Systems Engineering and Electronics
关键词 自适应均衡器 LMS算法 可变增益跨阻放大器 adaptive equalizer LMS algorithm variable gain trans-impedance amplifier
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参考文献5

  • 1Media Access Control Parameters, Physical Layer, Medium Attachment Units, and Repeaters for 100 Mb/s Pperation, Type 100 BASE-T[S]. IEEE Standard 802.3,1995.
  • 2Wong C S H, Rudell J C, Uehara G T, et al. A 50 MHz Eight-Tap Adaptive Equalizer fro Partial-Response Channels[J]. IEEE Journal of Solid-State Circuits, 1995,30(3).
  • 3Everitt J, Parker J F, Hurst P, et al. A CMOS Transceiver for 10-Mb/s and 100-Mb/s Ethernet[J]. IEEE Journal of Solid-State Circuits, 1998,33:2196-2177.
  • 4Rabaey Jan M. Digital Integrated Circuits:A Design Perspective[M]. Prentic-Hall Inc., 1966.
  • 5Kiriaki S, Viswanathan T L, Feygin G, et al. A 160-MHz Analog Equalizer for Magnetic Disk Read Channels[J]. IEEE Journal of Solid-State Circuits, 1997,32(11):1938-1850.

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