摘要
In order to suppress multi-bunch couple instabilities caused by transverse impedance, a bunch-by-bunch transverse feedback system based on a FPGA digital processor is commissioned at SSRF storage ring. The RF front end has two COD pre-rejected attenuators for increasing the system arrangement and signal noise ratio, and the 3*RF Local signal comes from the BPM's sum signal using a FIR filter for avoiding the effect of longitudinal oscillation. The digital processor receives the coupled horizontal and vertical oscillation signals in the base band and transforms the coupled signals to the horizontal and vertical feedback signals with two series double-zeroes FIR filters. A matlab GUI is applied for producing the FIR coefficients when the tune is shifted. The horizontal and vertical Kickers have a special design for increasing the shunt impedance. Then the multi-bunch instabilities are suppressed respectively and the minimum damping time is about 0.4 ms.
In order to suppress multi-bunch couple instabilities caused by transverse impedance, a bunch-by-bunch transverse feedback system based on a FPGA digital processor is commissioned at SSRF storage ring. The RF front end has two COD pre-rejected attenuators for increasing the system arrangement and signal noise ratio, and the 3*RF Local signal comes from the BPM’s sum signal using a FIR filter for avoiding the effect of longitudinal oscillation. The digital processor receives the coupled horizontal and vertical oscillation signals in the base band and transforms the coupled signals to the horizontal and vertical feedback signals with two series double-zeroes FIR filters. A matlab GUI is applied for producing the FIR coefficients when the tune is shifted. The horizontal and vertical Kickers have a special design for increasing the shunt impedance. Then the multi-bunch instabilities are suppressed respectively and the minimum damping time is about 0.4 ms.
