摘要
数字滤波器是语音与图像处理和模式识别等应用中的一种基本数字信号处理部件。本文提出了一种3G移动通信脉冲成形FIR滤波器的定向系统芯片实现结构:基于分布式运算(DA,即Dis tributedArithmetic)结构的查表法。使用了Alter公司的FPGA芯片-EP1K50QC208-3,阶数和位数以及滤波器特性均可方便改变。
Digital filters are basic components in the application of voice and image processing and pattern recognitior models. This paper presents a system-on-chip oriented implementation architecture for pulse shaping FIR filters used in 3G mobile communications: the look-up-table based on the distributed arithmetic architecture. The proposed architecture is prototyped with FPGA implementation and can integrated directly to ASIC products. Adopting FPGA chip—EP1K50QC208-3 which is designed by Alter Company, both of the numbers of tap and bit and the filter characteristics can be changed easily.
出处
《电讯技术》
北大核心
2004年第3期153-156,共4页
Telecommunication Engineering
