Design and test of a ME chip based on FPGAs

Design and test of a ME chip based on FPGAs

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摘要 Introduces the characteristic of FPGA,motion estimation and full search block matching arithmetic,analyses collectivity configuration of basic working flow in ME and discusses in detall the control,computing and test part of ME chip implementation. Introduces the characteristic of FPGA,motion estimation and full search block matching arithmetic,analyses collectivity configuration of basic working flow in ME and discusses in detall the control,computing and test part of ME chip implementation.

作者苏贵轩季振洲曲云波

出处《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2000年第4期21-24,共4页 哈尔滨工业大学学报（英文版）

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关键词 Motion Estimation PROGRAMMABLE LOGIC Devices Field PROGRAMMABLE GATE Array the Full Search Block MATCHING ARITHMETIC Motion Estimation Programmable Logic Devices Field Programmable Gate Array the Full Search Block Matching Arithmetic

分类号 TP274 [自动化与计算机技术—检测技术与自动化装置]

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Journal of Harbin Institute of Technology(New Series)

2000年第4期

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Design and test of a ME chip based on FPGAs

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