摘要
In this paper, an application specific processor architecture is proposed as an IDCT (Inverse Discrete Cosine Transform) engine for MPEG-1[1-3] video stream decoding. The engine executes an efficient implementation ofthe Feig algorithm. Performance evaluation concludes that the proposed architecture can adequately deal with real bineMPEG-1 IDCT requirement together with achievable cost reduction when compared with dedicated hardware approach[4]. In addition, it can be observed that the proposed architecture can also be utilized to deal with Other functionalities such as variable length MPEG-1 bitstream decoding, inverse one dimensional (1D) DCT (Discrete CosineTransform) audio decoding.
In this paper, an application specific processor architecture is proposed as an IDCT (Inverse Discrete Cosine Transform) engine for MPEG-1[1-3] video stream decoding. The engine executes an efficient implementation ofthe Feig algorithm. Performance evaluation concludes that the proposed architecture can adequately deal with real bineMPEG-1 IDCT requirement together with achievable cost reduction when compared with dedicated hardware approach[4]. In addition, it can be observed that the proposed architecture can also be utilized to deal with Other functionalities such as variable length MPEG-1 bitstream decoding, inverse one dimensional (1D) DCT (Discrete CosineTransform) audio decoding.
