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LOGICAL SYNTHESIS OF MOLTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL ADDERS

LOGICAL SYNTHESIS OF MOLTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL ADDERS
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摘要 This paper discusses the definition and properties of multivalued symmetric functions, points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj corresponding to j must be a symmetric function, and it may be expressed as the sum of products form of degenerated multivalued fundamental symmetric functions. Based on this consideration, the circuit realization for the multivalued symmetric functions based on full adders is proposed. This paper discusses the definition and properties of multivalued symmetric functions, points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj corresponding to j must be a symmetric function, and it may be expressed as the sum of products form of degenerated multivalued fundamental symmetric functions. Based on this consideration, the circuit realization for the multivalued symmetric functions based on full adders is proposed.
出处 《Journal of Electronics(China)》 1996年第4期360-365,共6页 电子科学学刊(英文版)
基金 Natural Science Foundation of Zhejiang Province
关键词 Multivalued LOGIC SYMMETRIC FUNCTIONS LOGIC DESIGN Multivalued logic Symmetric functions Logic design
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