基于CPLD的多单片机总线仲裁的设计与实现

Design and implementation of multi-single-chip computers interconnection organization based on CPLD

讨论了多单片机系统的几种互联方案 ,并设计了公共总线方案 ,给出了系统的总体结构框图 .在总线仲裁机构设计中应用了复杂可编程逻辑器件CPLD ,固化了和总线仲裁有关的总线逻辑关系 .从而节省了大量的元器件 ,保证了设计的高可靠性、系统的可维护性和升级的能力 ,而且保证了总线模块在其它嵌入式多机系统中的可移植性 ,并给出使用状态机进行设计的详细过程及仿真结果 .

Several interconnection schemes of multi-single-chip computers were discussed in this paper. The common-bus scheme is designed and the overall structure framework chart of the system was also presented. The complex programmable logic unit CPLD was applied in the design of the bus arbitration organization. The bus logic relationship relative to the bus arbitration is solidified, thus saving lots of components and ensuring high reliability of the design. Meantime, the system maintainability and the ability to upgrade are also guaranteed. Furthermore, the portability of the bus module into other built-in multi-computer systems is assured. The detailed process and imitation result of design by utilizing status machine is given in this paper, laying the foundation for practical application.